1. Field of the Invention
The present invention relates to a liquid crystal display (LCD) panel, and more specifically, to a method of operation of a standby mode of an LCD panel.
2. Description of the Prior Art
A LCD panel operating in the normal mode displays an image with high color, high contrast, and high refresh rate, but has higher power consumption.
Generally, the equation used in calculating the consumed power is: CV2F+ISV; where C is capacitance; V is voltage; F is frequency, and IS is static current. The values of the capacitance and the voltage usually determine the size and resolution of the LCD panel, and the frequency determines the resolution and performance of a first switch. For reducing power consumption, the LCD panel displays a static image in low gray level via a circuit so that a lower voltage and frequency are transmitted in the data line.
Please refer to FIG. 1 and FIG. 2. FIG. 1 is a schematic diagram of an LCD panel pixel driver 10 combined with a digital memory 22 according to the prior art. FIG. 2 is a diagram of signals of the pixel driver 10. In FIG. 1, the pixel driver 10 comprises a first switch 12, a storage capacitor 14, and a liquid crystal capacitor 16. The signal of a scan line 20 turns on the first switch 12 so that the signal in the data line 18 is transmitted to the liquid crystal capacitor 16. The storage capacitor 14 and the liquid crystal capacitor 16 are connected in parallel for maintaining the voltage of the liquid crystal capacitor 16. Additionally, the pixel driver 10 comprises a digital memory 22. A first end of the pixel driver 10 is connected to a first end of liquid crystal capacitor 16, and a second end of the pixel driver 10 is connected to the first end of the liquid crystal capacitor 16 through a third switch 24. A second end of the liquid crystal capacitor 16 is connected to a common voltage VCOM that is an oscillating voltage. The second switch 24 and the third switch 26 are controlled by a first control line 28 and a second control line 30 respectively.
When the LCD panel operates in a normal mode, the first control line 28 turns off the second switch 24, and the second control line 30 turns off the third switch 26. The data in the data line 18 is transmitted to the liquid crystal capacitor 16 through the first switch 12.
When the LCD panel operates in a standby mode, the data of the liquid crystal capacitor 16 is possibly a high voltage or a low voltage. FIG. 2 is a schematic diagram showing the data in the liquid crystal capacitor 16 as a high voltage when the LCD panel operates in a standby mode. In FIG. 2, when the LCD panel operates in a pre-standby mode, the signal of the first control line 28 turns on the second switch 24 to transmit the high voltage stored in the liquid crystal capacitor 16 to the digital memory 22. Then, when the LCD panel operates in standby mode, according to the oscillating cycle of the common voltage VCOM, the second switch 24 and the third switch 26 are turned on and off in turn to maintain a constant voltage difference in the liquid crystal capacitor 16 so that the LCD panel displays a black image. When the voltage stored in the digital memory 22 in the pre-standby mode is a low voltage, according to the oscillating cycle of the common voltage VCOM, with the second switch 24 and the third switch 26 being turned on and off in turn, the voltage difference in the liquid crystal capacitor 16 is zero so that the LCD panel displays a white image. In addition, storing the voltage of the liquid crystal capacitor 16 in the digital memory 22 can temporarily stop output of the high-frequency voltage in the data line 18 for reducing power consumption.
Please refer to FIG. 3. FIG. 3 is a schematic diagram of an LCD panel pixel driver 32 incorporating a dynamic memory 32 according to the prior art. In FIG. 3, the same elements of FIG. 1 use the same symbols. In addition to the first switch 12, the storage capacitor 14, and the liquid crystal capacitor 16, the pixel driver 32 further comprises a selection switch 34, a complementary selection switch 36, a first connection switch 38, a second connection switch 40, and an address switch 42. When the LCD panel operates in the normal mode, the signal of the scan line 20 turns on the first switch 12 and the address switch 42, and an updating signal line 44, and turns off the first connection switch 38 and the second switch 40, and further, inputs the signal in the data line 18 to the storage capacitor 14. When the voltage stored in the storage capacitor 14 is a high voltage, the selection switch 34 is turned on to transmit the signal of a reference voltage line 46 to the liquid crystal capacitor 16. When the voltage stored in the storage capacitor 14 is a low voltage, the selection switch 34 is turned off and the voltage of the liquid crystal capacitor 16 is held. The voltage of the liquid crystal capacitor 16 is controlled by the time that the first switch 12 and the address switch 42 are turned on by the scan line 20.
When the LCD panel operates in the standby mode, the signal of the scan line 20 turns off the first switch 12 and the address switch 42, and the signal of the updating signal line 44 turns on the first connection switch 38 and the second connection switch 40. When the voltage stored in the storage capacitor 14 is a high voltage, the selection switch 34 is turned on and the complementary selection switch 36 is turned off, and the signal in the reference voltage line 46 is transmitted to the liquid crystal capacitor 16 through the first connection switch 38. The LCD panel displays a black image. When the voltage stored in the storage capacitor 14 is a low voltage, the selection switch 34 is turned off and the complementary selection switch 36 is turned on, and the common voltage VCOM is transmitted to the liquid crystal capacitor 16 through the second connection switch 40. The LCD panel displays a white image. Therefore, the storage capacitor 14 is identical to the dynamic memory element recording the voltage of the liquid crystal capacitor 16 when the LCD panel operates in a standby mode, and the high-frequency voltage in the data line is not transmitted for reducing power consumption.
When the LCD panel operates in a normal mode, higher voltage and frequency are transmitted in the data line 18 resulting in higher power consumption. Therefore after the LCD panel operates in a standby mode, the transient voltage is recorded by the memory in the pixel driver 32 so that the LCD panel displays a white or black display. However, when the pixel driver 10 in FIG. 1 is combined with the digital memory 22, the amount of transistors and signal lines assembled in the pixel driver 10 is quite large so that the pixel driver 32 is only suitable for a reflective or half-reflective LCD panel. Additionally, the common voltage of the pixel driver 32 in FIG. 3 is a non-oscillating signal that is not suitable for the purposes of reducing physical dimensions and power consumption.